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? 2009 microchip technology inc. ds22229a-page 1 MCP6401/1r/1u features ? low quiescent current: 45 a (typical) ? gain bandwidth product: 1 mhz (typical) ? rail-to-rail input and output ? supply voltage range: 1.8v to 6.0v ? unity gain stable ? extended temperature range: -40c to +125c ? no phase reversal applications ? portable equipment ? battery powered system ? medical instrumentation ? data acquisition equipment ? sensor conditioning ? supply current sensing ? analog active filters design aids ? spice macro models ? filterlab ? software ? mindi ? circuit designer & simulator ? microchip advanced part selector (maps) ? analog demonstration and evaluation boards ? application notes typical application description the microchip technology inc. MCP6401/1r/1u family of operational amplifiers (op amps) has low quiescent current (45 a, typical) and rail-to-rail input and output operation. this family is unity gain stable and has a gain bandwidth product of 1 mhz (typical). these devices operate with a single supply voltage as low as 1.8v. these features make the family of op amps well suited for single-supply, battery-powered applications. the MCP6401/1r/1u family is designed with microchip?s advanced cmos process and offered in single packages. all devices are available in the extended temperature rang e, with a power supply range of 1.8v to 6.0v. package types v out r 2 d 1 d 2 r 1 v in precision half-wave rectifier MCP6401 5 4 1 2 3 v ss v in ? v in + v dd v out sot-23-5, 5 4 1 2 3 v dd v in ? v in + v ss v out sc70-5, sot-23-5, 5 4 1 2 3 v dd v out v in ? v ss v in + sot-23-5, MCP6401 MCP6401r MCP6401u 1 mhz, 45 a op amps
MCP6401/1r/1u ds22229a-page 2 ? 2009 microchip technology inc. notes:
? 2009 microchip technology inc. ds22229a-page 3 MCP6401/1r/1u 1.0 electrical characteristics 1.1 absolute maximum ratings ? v dd ? v ss ........................................................................7.0v current at input pins .....................................................2 ma analog inputs (v in + , v in - )?? .......... v ss ? 1.0v to v dd + 1.0v all other inputs and outputs ......... v ss ? 0.3v to v dd + 0.3v difference input voltage ...................................... |v dd ? v ss | output short-circuit current .................................continuous current at output and supply pins ............................30 ma storage temperature ....................................-65c to +150c maximum junction temperature (t j ).......................... +150c esd protection on all pins (hbm; mm) ................ 4 kv; 400v ? notice: stresses above those list ed under ?absolute maxi- mum ratings? may cause permanent damage to the device. this is a stress rating only an d functional operation of the device at those or any other c onditions above those indicated in the operational listings of th is specification is not implied. exposure to maximum rating conditions for extended periods may affect device reliability. ?? see section 4.1.2 ?input voltage and current limits? 1.2 specifications table 1-1: dc electrical specifications electrical characteristics : unless otherwise indicated, v dd = +1.8v to +6.0v, v ss = gnd, t a = +25c, v cm = v dd /2, v out ?v dd /2, v l = v dd /2 and r l = 100 k to v l . (refer to figure 1-1 ). parameters sym min typ max units conditions input offset input offset voltage v os -4.5 ? +4.5 mv v cm = v ss input offset drift with temperature v os / t a ?2.0?v/ct a = -40c to +125c, v cm = v ss power supply rejection ratio psrr 63 78 ? db v cm = v ss input bias current and impedance input bias current i b ? 1.0 100 pa ?30?pat a = +85c ? 800 ? pa t a = +125c input offset current i os ? 1.0 ? pa common mode input impedance z cm ?10 13 ||6 ? ||pf differential input impedance z diff ?10 13 ||6 ? ||pf common mode common mode input voltage range v cmr v ss -0.2 ? v dd +0.2 v v dd = 1.8v, note 1 v ss -0.3 ? v dd +0.3 v v dd = 6.0v, note 1 common mode rejection ratio cmrr 56 71 ? db v cm = -0.2v to 2.0v, v dd = 1.8v 63 78 ? db v cm = -0.3v to 6.3v, v dd = 6.0v open-loop gain dc open-loop gain (large signal) a ol 90 110 ? db v out = 0.3v to v dd -0.3v v cm = v ss output maximum output voltage swing v ol, v oh v ss +20 ? v dd ?20 mv v dd = 6.0v, r l = 10 k 0.5v input overdrive output short-circuit current i sc ?5?mav dd = 1.8v ?15?mav dd = 6.0v power supply supply voltage v dd 1.8 ? 6.0 v quiescent current per amplifier i q 20 45 70 a i o = 0, v dd = 5.0v v cm = 0.2v dd note 1: figure 2-11 shows how v cmr changes across temperature.
MCP6401/1r/1u ds22229a-page 4 ? 2009 microchip technology inc. table 1-2: ac electrical specifications table 1-3: temperature specifications 1.3 test circuits the circuit used for most dc and ac tests is shown in figure 1-1 . this circuit can independently set v cm and v out ; see equation 1-1 . note that v cm is not the circuit?s common mode voltage ((v p +v m )/2), and that v ost includes v os plus the effects (on the input offset error, v ost ) of temperature, cmrr, psrr and a ol . equation 1-1: figure 1-1: ac and dc test circuit for most specifications. electrical characteristics: unless otherwise indicated, t a = +25c, v dd = +1.8 to +6.0v, v ss = gnd, v cm = v dd /2, v out v dd /2, v l = v dd /2, r l = 100 k to v l and c l = 60 pf. (refer to figure 1-1 ). parameters sym min typ max units conditions ac response gain bandwidth product gbwp ? 1 ? mhz phase margin pm ? 65 ? g = +1 v/v slew rate sr ? 0.5 ? v/s noise input noise voltage e ni ? 3.6 ? vp-p f = 0.1 hz to 10 hz input noise voltage density e ni ?28?nv/ hz f = 1 khz input noise current density i ni ?0.6?fa/ hz f = 1 khz electrical characteristics: unless otherwise indicated, v dd = +1.8v to +6.0v and v ss = gnd. parameters sym min typ max units conditions temperature ranges operating temperature range t a -40 ? +125 c note 1 storage temperature range t a -65 ? +150 c thermal package resistances thermal resistance, sot-23-5 ja ?220.7?c/w thermal resistance, sc70-5 ja ?331?c/w note 1: the internal junction temperature (t j ) must not exceed the absolute ma ximum specification of +150c. g dm r f r g ? = v cm v p v dd 2 ? + () 2 ? = v out v dd 2 ? () v p v m ? () v ost 1g dm + () ++ = where: g dm = differential mode gain (v/v) v cm = op amp?s common mode input voltage (v) v ost = op amp?s total input offset voltage (mv) v ost v in? v in+ ? = v dd r g r f v out v m c b2 c l r l v l c b1 100 k 100 k r g r f v dd /2 v p 100 k 100 k 60 pf 100 k 1f 100 nf v in? v in+ c f 6.8 pf c f 6.8 pf mcp640x
? 2009 microchip technology inc. ds22229a-page 5 MCP6401/1r/1u 2.0 typical performance curves note: unless otherwise indicated, t a = +25c, v dd = +1.8v to +6.0v, v ss = gnd, v cm = v dd /2, v out v dd /2, v l = v dd /2, r l = 100 k to v l and c l = 60 pf. figure 2-1: input offset voltage. figure 2-2: input offset voltage drift. figure 2-3: input offset voltage vs. common mode input voltage with v dd = 6.0v. figure 2-4: input offset voltage vs. common mode input voltage with v dd = 1.8v. figure 2-5: input offset voltage vs. output voltage. figure 2-6: input offset voltage vs. power supply voltage. note: the graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purpose s only. the performance characteristics listed herein are not tested or guaranteed. in so me graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power suppl y range) and therefore outs ide the warranted range. 0 0.03 0.06 0.09 0.12 0.15 0.18 0.21 0.24 -5 -4 -3 -2 -1 0 1 2 3 4 5 input offset voltage (mv) percentage of occurences 1760 samples v cm = v ss 0% 5% 10% 15% 20% 25% 30% 35% 40% 45% -10-8-6-4-20246810 input offset voltage drift (v/c) percentage of occurences 1760 samples v cm = v ss t a = -40c to +125c -100 0 100 200 300 400 500 600 700 800 900 1000 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 common mode input voltage (v) input offset voltage (v) t a = +125c t a = +85c t a = +25c t a = -40c v dd = 6.0v representative part -1000 -800 -600 -400 -200 0 200 400 600 800 1000 1200 -0.5 -0.3 -0.1 0.1 0.3 0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 common mode input voltage (v) input offset voltage (v) t a = +125c t a = +85c t a = +25c t a = -40c v dd = 1.8v representative part -1000 -750 -500 -250 0 250 500 750 1000 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 output voltage (v) input offset voltage (v) v dd = 6.0v v dd = 1.8v representative part -800 -600 -400 -200 0 200 400 600 800 1000 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 power supply voltage (v) input offset voltage (v) t a = +125c t a = +85c t a = +25c t a = -40c representative part
MCP6401/1r/1u ds22229a-page 6 ? 2009 microchip technology inc. note: unless otherwise indicated, t a = +25c, v dd = +1.8v to +6.0v, v ss = gnd, v cm = v dd /2, v out v dd /2, v l = v dd /2, r l = 100 k to v l and c l = 60 pf. figure 2-7: input noise voltage density vs. frequency. figure 2-8: input noise voltage density vs. common mode input voltage. figure 2-9: cmrr, psrr vs. frequency. figure 2-10: cmrr, psrr vs. ambient temperature. figure 2-11: common mode input voltage range limits vs. ambient temperature. figure 2-12: input bias, offset current vs. ambient temperature. 10 100 1,000 0.1 1 10 100 1000 10000 100000 frequency (hz) input noise voltage density (nv/ hz) 0.1 1 10 100 1k 10k 100k 0 5 10 15 20 25 30 35 40 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 common mode input voltage (v) input noise voltage density (nv/ hz) f = 1 khz v dd = 6.0 v 20 30 40 50 60 70 80 90 100 10 100 1000 10000 100000 1000000 frequency (hz) cmrr, psrr (db) 10 100 1k 10k 100k 1m cmrr psrr+ psrr- representative part 50 55 60 65 70 75 80 85 90 -50 -25 0 25 50 75 100 125 ambient temperature (c) cmrr, psrr (db) psrr (v dd = 1.8v to 6.0v, v cm = v ss ) cmrr (v dd = 6.0v, v cm = -0.3v to 6.3v) cmrr (v dd = 1.8v, v cm = -0.2v to 2.0v) -0.35 -0.30 -0.25 -0.20 -0.15 -0.10 -0.05 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 -50 -25 0 25 50 75 100 125 ambient temperature (c) common mode input voltage range limits (v) v cmr_l - v ss @ v dd = 1.8v v cmr_l - v ss @ v dd = 6.0v v cmr_h - v dd @ v dd = 6.0v v cmr_h - v dd @ v dd = 1.8v 1 10 100 1000 10000 25 35 45 55 65 75 85 95 105 115 125 ambient temperature (c) input bias, offset current (pa) input bias current input offset current v dd = 6.0v
? 2009 microchip technology inc. ds22229a-page 7 MCP6401/1r/1u note: unless otherwise indicated, t a = +25c, v dd = +1.8v to +6.0v, v ss = gnd, v cm = v dd /2, v out v dd /2, v l = v dd /2, r l = 100 k to v l and c l = 60 pf. figure 2-13: input bias current vs. common mode input voltage. figure 2-14: quiescent current vs ambient temperature. figure 2-15: quiescent current vs. power supply voltage. figure 2-16: open-loop gain, phase vs. frequency. figure 2-17: dc open-loop gain vs. power supply voltage. figure 2-18: dc open-loop gain vs. output voltage headroom. 1 10 100 1000 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 common mode input voltage (v) input bias current (pa) v dd = 6.0v t a = +125c t a = +85c 20 25 30 35 40 45 50 55 60 65 70 -50-25 0 255075100125 ambient temperature (c) quiescent current (a/amplifier) v cm = 0.2v dd v dd = 6.0v v dd = 5.0v v dd = 1.8v 0 10 20 30 40 50 60 70 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 power supply voltage (v) quiescent current (a) v cm = 0.2v dd t a = +125c t a = +85c t a = +25c t a = -40c -20 0 20 40 60 80 100 120 1.0e-01 1.0e+00 1.0e+01 1.0e+02 1.0e+03 1.0e+04 1.0e+05 1.0e+06 1.0e+07 frequency (hz) open-loop gain (db) -210 -180 -150 -120 -90 -60 -30 0 open-loop phase () open-loop gain open-loop phase v dd = 6.0v 0.1 1 10 100 1k 10k 100k 1m 10m 100 105 110 115 120 125 130 135 140 145 150 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 power supply voltage (v) dc open-loop gain (db) r l = 10 k ? v ss + 0.3v < v out < v dd - 0.3v 100 105 110 115 120 125 130 135 140 145 150 0.00 0.05 0.10 0.15 0.20 0.25 output voltage headroom v dd - v oh or v ol -v ss (v) dc open-loop gain (db) v dd = 6.0v v dd = 1.8v large signal a ol
MCP6401/1r/1u ds22229a-page 8 ? 2009 microchip technology inc. note: unless otherwise indicated, t a = +25c, v dd = +1.8v to +6.0v, v ss = gnd, v cm = v dd /2, v out v dd /2, v l = v dd /2, r l = 100 k to v l and c l = 60 pf. figure 2-19: gain bandwidth product, phase margin vs. ambient temperature. figure 2-20: gain bandwidth product, phase margin vs. ambient temperature. figure 2-21: output short circuit current vs. power supply voltage. figure 2-22: output voltage swing vs. frequency. figure 2-23: output voltage headroom vs. output current. figure 2-24: output voltage headroom vs. ambient temperature. 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 -50 -25 0 25 50 75 100 125 ambient temperature (c) gain bandwidth product (mhz) 45 50 55 60 65 70 75 80 85 90 phase margin () gain bandwidth product phase margin v dd = 6.0v 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 -50 -25 0 25 50 75 100 125 ambient temperature (c) gain bandwidth product (mhz) 45 50 55 60 65 70 75 80 85 90 phase margin () gain bandwidth product phase margin v dd = 1.8v 0 5 10 15 20 25 30 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 power supply voltage (v) output short circuit current (ma) t a = -40c t a = +25c t a = +85c t a = +125c 0.1 1 10 100 1000 10000 100000 1000000 frequency (hz) output voltage swing (v p-p ) v dd = 1.8v v dd = 6.0v 100 1k 10k 100k 1m 0.1 1 10 100 1000 10 100 1000 10000 output current (ma) output voltage headroom (mv) 0.01 0.1 1 10 v dd - v oh @ v dd = 1.8v v ol - v ss @ v dd = 1.8v v dd - v oh @ v dd = 6.0v v ol - v ss @ v dd = 6.0v r l = 10 k ?
? 2009 microchip technology inc. ds22229a-page 9 MCP6401/1r/1u note: unless otherwise indicated, t a = +25c, v dd = +1.8v to +6.0v, v ss = gnd, v cm = v dd /2, v out v dd /2, v l = v dd /2, r l = 100 k to v l and c l = 60 pf. figure 2-25: slew rate vs. ambient temperature. figure 2-26: small signal non-inverting pulse response. figure 2-27: small signal inverting pulse response. figure 2-28: large signal non-inverting pulse response. figure 2-29: large signal inverting pulse response. figure 2-30: the MCP6401/1r/1u shows no phase reversal. 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 -50-250 255075100125 ambient temperature (c) slew rate (v/s) falling edge, v dd = 6.0v rising edge, v dd = 6.0v falling edge, v dd = 1.8v rising edge, v dd = 1.8v time (2 s/div) output voltage (20 mv/div) v dd = 6.0v g = +1 v/v time (2 s/div) output voltage (20 mv/div) v dd = 6.0v g = -1 v/v 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 time (20 s/div) output voltage (v) v dd = 6.0v g = +1 v/v 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 time (20 s/div) output voltage (v) v dd = 6.0v g = -1 v/v -1.0 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 time (0.1 ms/div) input, output voltages (v) v dd = 6.0v g = +2 v/v v out v in
MCP6401/1r/1u ds22229a-page 10 ? 2009 microchip technology inc. note: unless otherwise indicated, t a = +25c, v dd = +1.8v to +6.0v, v ss = gnd, v cm = v dd /2, v out v dd /2, v l = v dd /2, r l = 100 k to v l and c l = 60 pf. figure 2-31: closed loop output impedance vs. frequency. figure 2-32: measured input current vs. input voltage (below v ss ). 1 10 100 1000 10000 1.0e+01 1.0e+02 1.0e+03 1.0e+04 1.0e+05 1.0e+06 frequency (hz) closed loop output impedance () g n : 101 v/v 11 v/v 1 v/v 10 100 1k 10k 100k 1m 1.e-12 1.e-11 1.e-10 1.e-09 1.e-08 1.e-07 1.e-06 1.e-05 1.e-04 1.e-03 -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0 v in (v) -i in (a) 1m 100 10 1 100n 10n 1n 100 p 10 p 1p t a = -40c t a = +25c t a = +85c t a = +125c
? 2009 microchip technology inc. ds22229a-page 11 MCP6401/1r/1u 3.0 pin descriptions descriptions of the pins are listed in table 3-1 . table 3-1: pin function table 3.1 analog output (v out ) the output pin is low-impedance voltage source. 3.2 analog inputs (v in +, v in -) the non-inverting and inverting inputs are high- impedance cmos inputs with low bias currents. 3.3 power supply pin (v dd , v ss ) the positive power supply (v dd ) is 1.8v to 6.0v higher than the negative power supply (v ss ). for normal operation, the other pins are at voltages between v ss and v dd . typically, these parts are used in a single (positive) supply configuration. in this case, v ss is connected to ground and v dd is connected to the supply. v dd will need bypass capacitors. MCP6401 MCP6401r MCP6401u symbol description sc70-5, sot-23-5 sot-23-5 sot-23-5 11 4 v out analog output 25 2 v ss negative power supply 331v in + non-inverting input 44 3 v in ? inverting input 52 5 v dd positive power supply
MCP6401/1r/1u ds22229a-page 12 ? 2009 microchip technology inc. notes:
? 2009 microchip technology inc. ds22229a-page 13 MCP6401/1r/1u 4.0 application information the MCP6401/1r/1u family of op amps is manufactured using microchip?s state-of-the-art cmos process and is specifically designed for low-power, high precision applications. 4.1 rail-to-rail input 4.1.1 phase reversal the MCP6401/1r/1u op amps are designed to prevent phase reversal when the input pins exceed the supply voltages. figure 2-30 shows the input voltage exceeding the supply voltage without any phase reversal. 4.1.2 input voltage and current limits the esd protection on the inputs can be depicted as shown in figure 4-1 . this structure was chosen to protect the input transistors and to minimize input bias current (i b ). the input esd diodes clamp the inputs when they try to go more than one diode drop below v ss . they also clamp any voltage that go too far above v dd ; their breakdown voltage is high enough to allow normal operation and low enough to bypass esd events within the specified limits. figure 4-1: simplified analog input esd structures. in order to prevent damage and/or improper operation of these op amps, the circuit they are in must limit the voltages and currents at the v in+ and v in- pins (see absolute maxi mum ratings ? at the beginning of section 1.0 ?electri cal characteristics? ). figure 4-2 shows the recommended approach to protecting these inputs. the internal esd diodes prevent the input pins (v in+ and v in- ) from going too far below ground, and the resistors r 1 and r 2 limit the possible current drawn out of the input pins. diodes d 1 and d 2 prevent the input pins (v in+ and v in- ) from going too far above v dd . when implemented as shown, resistors r 1 and r 2 also limit the current through d 1 and d 2 . figure 4-2: protecting the analog inputs. it is also possible to connect the diodes to the left of the resistors r 1 and r 2 . in this case, the currents through the diodes d 1 and d 2 need to be limited by some other mechanism. the resistors th en serve as in-rush current limiters; the dc currents into the input pins (v in+ and v in- ) should be very small. a significant amount of current can flow out of the inputs when the common mode voltage (v cm ) is below ground (v ss ). (see figure 2-32 ). 4.1.3 normal operation the input stage of the MCP6401/1r/1u op amps uses two differential input stages in parallel. one operates at a low common mode input voltage (v cm ), while the other operates at a high v cm . with this topology, the device operates with a v cm up to 300 mv above v dd and 300 mv below v ss . (see figure 2-11 ). the input offset voltage is measured at v cm = v ss ?0.3v and v dd + 0.3v to ensure proper operation. the transition between the input stages occurs when v cm is near v dd ? 1.1v (see figures 2-3 and 2-4 ). for the best distortion performance and gain linearity, with non-inverting gains, avoid this region of operation. 4.2 rail-to-rail output the output voltage range of the MCP6401/1r/1u op amps is v ss + 20 mv (minimum) and v dd ? 20 mv (maximum) when r l =10k is connected to v dd /2 and v dd = 6.0v. refer to figures 2-23 and 2-24 for more information. bond pad bond pad bond pad v dd v in + v ss input stage bond pad v in ? v 1 r 1 v dd d 1 r 1 > v ss ? (minimum expected v 1 ) 2ma r 2 > v ss ? (minimum expected v 2 ) 2ma v 2 r 2 d 2 r 3 mcp640x
MCP6401/1r/1u ds22229a-page 14 ? 2009 microchip technology inc. 4.3 capacitive loads driving large capacitive loads can cause stability problems for voltage feedback op amps. as the load capacitance increases, the feedback loop?s phase margin decreases and the closed-loop bandwidth is reduced. this produces ga in peaking in the frequency response, with overshoot and ringing in the step response. while a unity-gain buffer (g = +1 v/v) is the most sensitive to capacitive loads, all gains show the same general behavior. when driving large capacitive loads with these op amps (e.g., > 100 pf when g = +1 v/v), a small series resistor at the output (r iso in figure 4-3 ) improves the feedback loop?s phase margin (stability) by making the output load resistive at higher frequencies. the bandwidth will be generally lower than the bandwidth with no capacitance load. figure 4-3: output resistor, r iso stabilizes large capacitive loads. figure 4-4 gives recommended r iso values for different capacitive loads and gains. the x-axis is the normalized load capacitance (c l /g n ), where g n is the circuit's noise gain. for non-inverting gains, g n and the signal gain are equal. for inverting gains, g n is 1+|signal gain| (e.g., -1 v/v gives g n = +2 v/v). figure 4-4: recommended r iso values for capacitive loads. after selecting r iso for your circuit, double-check the resulting frequency response peaking and step response overshoot. modify r iso ?s value until the response is reasonable. bench evaluation and simulations with the MCP6401/1r/1u spice macro model are very helpful. 4.4 supply bypass with this family of operat ional amplifiers, the power supply pin (v dd for single-supply) should have a local bypass capacitor (i.e., 0.01 f to 0.1 f) within 2 mm for good high frequency performance. it can use a bulk capacitor (i.e., 1 f or larger) within 100 mm to provide large, slow currents. this bulk capacitor can be shared with other analog parts. 4.5 pcb surface leakage in applications where low input bias current is critical, printed circuit board (pcb) surface leakage effects need to be considered. surf ace leakage is caused by humidity, dust or other contamination on the board. under low humidity conditions, a typical resistance between nearby traces is 10 12 . a 5v difference would cause 5 pa of current to flow; which is greater than the MCP6401/1r/1u family?s bias current at +25c (1.0 pa, typical). the easiest way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). the guard ring is biased at the same voltage as the sensitive pin. an example of this type of layout is shown in figure 4-5 . figure 4-5: example guard ring layout for inverting gain. 1. non-inverting gain and unity-gain buffer: a) connect the non-inverting pin (v in +) to the input with a wire that does not touch the pcb surface. b) connect the guard ring to the inverting input pin (v in ?). this biases the guard ring to the common mode input voltage. 2. inverting gain and transimpedance gain amplifiers (convert current to voltage, such as photo detectors): a) connect the guard ring to the non-inverting input pin (v in +). this biases the guard ring to the same reference voltage as the op amp (e.g., v dd /2 or ground). b) connect the inverting pin (v in ?) to the input with a wire that does not touch the pcb surface. v in r iso v out c l ? + mcp640x 1 10 100 1000 10000 1.e-11 1.e-10 1.e-09 1.e-08 1.e-07 1.e-06 normalized load capacitance; c l /g n (f) recommended r iso ( ? ) g n : 1 v/v 2 v/v 5 v/v v dd = 6.0 v r l = 10 k ? 10p 100p 1n 10n 0.1 1 guard ring v in ?v in + v ss
? 2009 microchip technology inc. ds22229a-page 15 MCP6401/1r/1u 4.6 application circuits 4.6.1 precision half-wave rectifier the precision half-wave rectifier, which is also known as a super diode, is a configuration obtained with an operational amplifier in order to have a circuit behaving like an ideal diode and rectifier. it effectively cancels the forward voltage drop of the diode so that very low level signals can still be rectified with minimal error. this can be useful for high-precision signal processing. the MCP6401/1r/1u op amps have high input impedance, low input bias current and ra il-to-rail input/output, which makes this device suitable for precision rectifier applications. figure 4-6 shows a precision half -wave rectifier and its transfer characteristic. th e rectifier?s input impedance is determined by the input resistor r 1 . to avoid loading effect, it must be driven from a low impedance source. when v in is greater than zero, d 1 is off and d 2 is on, v out is zero. when v in is less than zero, d 1 is on and d 2 is off, and v out is the v in with an amplification of -r 2 /r 1 . the rectifier ci rcuit shown in figure 4-6 has the benefit that the op amp never goes in saturation, so the only thing affecting its frequency response is the amplification and the gain bandwidth product. . figure 4-6: precision half-wave rectifier. 4.6.2 battery current sensing the MCP6401/1r/1u op amps? common mode input range, which goes 0.3v beyond both supply rails, supports their use in high side and low side battery current sensing applications. the low quiescent current (45 a, typical) helps prolong battery life, and the rail-to-rail output supports detection of low currents. figure 4-7 shows a high side battery current sensor circuit. the 10 resistor is sized to minimize power losses. the battery current (i dd ) through the 10 resistor causes its top terminal to be more negative than the bottom terminal. this keeps the common mode input voltage of the op amp below v dd , which is within its allowed range. th e output of the op amp will also be below v dd , which is within its maximum output voltage swing specification. figure 4-7: supply current sensing. 4.6.3 instrumentation amplifier the MCP6401/1r/1u op amps are well suited for conditioning sensor signals in battery-powered applications. figure 4-8 shows a two op amp instrumentation amplifier, using the MCP6401, that works well for applications requiring rejection of common mode noise at higher gains. the reference voltage (v ref ) is supplied by a low impedance source. in single supply applications, v ref is typically v dd /2. figure 4-8: two op amp instrumentation amplifier. v out r 2 d 1 d 2 r 1 v in v out v in -r 2 /r 1 transfer characteristic precision half-wave rectifier MCP6401 v dd i dd 100 k 1m 1.8v v out 10 to 6.0v i dd v dd v out ? 10 v/v () 10 () ? ----------------------------------------- - = to load MCP6401 v out v 1 v 2 ? () 1 r 1 r 2 ----- - 2r 1 r g --------- ++ ?? ?? v ref + = v ref r 1 r 2 r 2 r 1 v out r g v 2 v 1 MCP6401 MCP6401
MCP6401/1r/1u ds22229a-page 16 ? 2009 microchip technology inc. notes:
? 2009 microchip technology inc. ds22229a-page 17 MCP6401/1r/1u 5.0 design aids microchip provides the basic design tools needed for the MCP6401/1r/1u family of op amps. 5.1 spice macro model the latest spice macro model for the MCP6401/1r/ 1u op amp is available on the microchip web site at www.microchip.com. the model was written and tested in official orcad (cadenc e) owned pspice. for the other simulators, it may require translation. the model covers a wide aspect of the op amp's electrical specifications. not only does the model cover voltage, current, and resistance of the op amp, but it also covers the temperature and noise effects on the behavior of the op amp. the model has not been verified outside of the specification range listed in the op amp data sheet. the model behaviors under these conditions cannot be guarante ed that it will match the actual op amp performance. moreover, the model is intended to be an initial design tool. bench testing is a very important part of any design and cannot be replaced with simulations. also, simulation results using this macro model need to be validated by comparing them to the data sheet specifications and characteristic curves. 5.2 filterlab ? software microchip?s filterlab ? software is an innovative software tool that simplifies analog active filter (using op amps) design. available at no cost from the microchip web site at www.m icrochip.com/filterlab, the filterlab design tool prov ides full schematic diagrams of the filter circuit with component values. it also outputs the filter circuit in spice format, which can be used with the macro model to simulate actual filter performance. 5.3 mindi? circuit designer & simulator microchip?s mindi? circuit designer & simulator aids in the design of various circuits useful for active filter, amplifier and power-management applications. it is a free online circuit designer & simulator available from the microchip web site at www.microchip.com/mindi. this interactive circuit designer & simulator enables designers to quickly generate circuit diagrams, simulate circuits. circuits developed using the mindi circuit designer & simulator can be downloaded to a personal computer or workstation. 5.4 microchip advanced part selector (maps) maps is a software tool that helps semiconductor professionals efficiently identify microchip devices that fit a particular design require ment. available at no cost from the microchip website at www.microchip.com/ maps, the maps is an overall selection tool for microchip?s product portfolio that includes analog, memory, mcus and dscs. using this tool you can define a filter to sort featur es for a parametric search of devices and export side-by-side technical comparison reports. helpful links are also provided for datasheets, purchase, and sampling of microchip parts. 5.5 analog demonstration and evaluation boards microchip offers a broad spectrum of analog demonstration and evaluat ion boards that are designed to help you achieve faster time to market. for a complete listing of these boards and their corresponding user?s guides and technical information, visit the microchip web si te at www.microchip.com/ analogtools. some boards that are especially useful are: ? mcp6xxx amplifier evaluation board 1 ? mcp6xxx amplifier evaluation board 2 ? mcp6xxx amplifier evaluation board 3 ? mcp6xxx amplifier evaluation board 4 ? active filter demo board kit ? 5/6-pin sot-23 evaluation board, p/n vsupev2 ? 8-pin soic/msop/tssop/ dip evaluation board, p/n soic8ev
MCP6401/1r/1u ds22229a-page 18 ? 2009 microchip technology inc. 5.6 application notes the following microchip analog design note and application notes are available on the microchip web site at www.microchip. com/appnotes and are recommended as supplemental reference resources. ? adn003: ?select the right operational amplifier for your filtering circuits?, ds21821 ? an722: ?operational amplifier topologies and dc specifications?, ds00722 ? an723: ?operational amplifier ac specifications and applications?, ds00723 ? an884: ?driving capacitive loads with op amps?, ds00884 ? an990: ?analog sensor conditioning circuits ? an overview?, ds00990 ? an1177: ?op amp precision design: dc errors?, ds01177 ? an1228: ?op amp precision design: random noise?, ds01228 ? an1297: ?microchip?s op amp spice macro models?, ds01297 these application notes and others are listed in the design guide: ? ?signal chain design guide?, ds21825
? 2009 microchip technology inc. ds22229a-page 19 MCP6401/1r/1u 6.0 packaging information 6.1 package marking information 5-lead sc70 (MCP6401 only) example: legend: xx...x customer-specific information y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code pb-free jedec designator for matte tin (sn) * this package is pb-free. the pb-free jedec designator ( ) can be found on the outer packaging for this package. note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e example: 5-lead sot-23 xxnn bl25 xxnn nl25 part number code MCP6401t-e/ot nlnn MCP6401rt-e/ot nmnn MCP6401ut-e/ot npnn
MCP6401/1r/1u ds22229a-page 20 ? 2009 microchip technology inc.

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? 2009 microchip technology inc. ds22229a-page 23 MCP6401/1r/1u/2 appendix a: revision history revision a (december 2009) ? original release of this document.
MCP6401/1r/1u/2 ds22229a-page 24 ? 2009 microchip technology inc. notes:
? 2009 microchip technology inc. ds22229a-page 25 MCP6401/ir/1u product identification system to order or obtain information, e.g., on pricing or de livery, refer to the factory or the listed sales office . device: MCP6401t: single op amp (tape and reel) (sc70-5, sot-23-5) MCP6401rt: single op amp (tape and reel) (sot-23-5) MCP6401ut: single op amp (tape and reel) (sot-23-5) temperature range: e = -40c to +125c package: lt = plastic package (sc70), 5-lead ot = plastic small outline transistor (sot-23), 5-lead part no. x /xx package temperature range device examples: a) MCP6401t-e/lt: tape and reel, 5ld sc70 pkg b) MCP6401t-e/ot: tape and reel, 5ld sot-23 pkg c) MCP6401rt-e/ot: tape and reel, 5ld sot-23 pkg d) MCP6401ut-e/ot: tape and reel, 5ld sot-23 pkg
MCP6401/ir/1u ds22229a-page 26 ? 2009 microchip technology inc. notes:
? 2009 microchip technology inc. ds22229a-page 27 information contained in this publication regarding device applications and the like is prov ided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application me ets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safe ty applications is entirely at the buyer?s risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting fr om such use. no licenses are conveyed, implicitly or ot herwise, under any microchip intellectual property rights. trademarks the microchip name and logo, th e microchip logo, dspic, k ee l oq , k ee l oq logo, mplab, pic, picmicro, picstart, rfpic and uni/o are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. filterlab, hampshire, hi-tech c, linear active thermistor, mxdev, mxlab, seeval and the embedded control solutions company are register ed trademarks of microchip technology incorporated in the u.s.a. analog-for-the-digital age, a pplication maestro, codeguard, dspicdem, dspicdem.net, dspicworks, dsspeak, ecan, economonitor, fansense, hi-tide, in-circuit serial programming, icsp, mindi, miwi, mpasm, mplab certified logo, mplib, mplink, mtouch, octopus, omniscient code generation, picc, picc-18, picdem, picdem.net, pickit, pictail, pic 32 logo, real ice, rflab, select mode, total endurance, tsharc, uniwindr iver, wiperlock and zena are trademarks of microchip te chnology incorporated in the u.s.a. and other countries. sqtp is a service mark of mi crochip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 2009, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. note the following details of the code protection feature on microchip devices: ? microchip products meet the specification cont ained in their particular microchip data sheet. ? microchip believes that its family of products is one of the mo st secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal meth ods used to breach the code protection fe ature. all of these methods, to our knowledge, require using the microchip pr oducts in a manner outside the operating specif ications contained in microchip?s data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are committed to continuously improving the code protection features of our products. attempts to break microchip?s c ode protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your softwa re or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the company?s quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microperi pherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified.
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